In data communication systems, data is often transmitted as binary information in the form of bits, where a relatively high voltage represents a bit having a logic value 1 and a relatively low voltage represents a bit having a logic value 0 (or vice versa). To increase throughput, multiple bits may be transmitted in parallel over one or more data buses or channels, each channel having several sub-channels. For example, a data channel may include eight sub-channels to transmit eight bits during a given bit time.
In AC-signaling systems, the number of sub-channel bit transitions, i.e., where some sub-channel bits transition at the start of a new bit time between high and low voltages on a given channel, is directly proportional to the amount of supply current drawn by that channel. As such, signal streams with a smaller average number of bit transitions per bit time draw lower supply current and signal streams with a larger average number of bit transitions per bit time draw higher supply current. Current fluctuations due to variations in bit patterns can cause noise within the system and are somewhat mitigated using data bus inversion (DBI), where an inverse operation is conditionally applied to the parallel bits on a data channel to reduce the average number of bit transitions per bit time as well as the range of the number of bit transitions per bit time, and an additional signal line is used to signal whether DBI is on or off at each bit time.